Switched capacitor delta-sigma modulators are widely used in such applications as digital audio and industrial process control instrumentation. In such modulators the negative feedback around the modulator loop is provided by a switched capacitor which is connected between the output of the quantizer of the modulator and the input summing node of the modulator.
FIG. 1A is a block diagram of such a prior art delta-sigma modulator. As shown in FIG. 1A, the delta-sigma modulator 10 includes a summing node 12 which sums an input signal 14 with a feedback signal on line 16. The summing node is connected to the input of an integrator 18, and the output of the integrator is filtered through a loop filter 20. The output of the loop filter 20 is connected to the input of a quantizer or A/D convertor shown as a comparator 22. The output of the comparator 22 forms the output, DOUT, of the modulator on line 24 and also forms the input to the switched capacitor feedback circuit shown generally as 26. The output of the switched capacitor feedback circuit is the feedback signal to the summing node 12.
The switched capacitor feedback circuit 26 includes a first single pole, double throw switch 28, which switches between a reference voltage, Vref, and ground in response to the output signal DOUT on line 24. The feedback capacitor 30, shown as C.sub.FB, has a first terminal connected to the pole of a switch 28, shown as element "a" of switch 28, and its opposite terminal connected to a node 32 which is also connected to the pole of another single pole, double throw switch 34. The pole of switch 34, shown as element "a" of switch 34, is either connected to throw "c" which is connected to ground, or to throw "b" which is connected the summing node 12 in a timing sequence that is well known in the art and shown in FIG. 2B.
More particularly, during the first part of each sampling period, switch 28 is connected to either throw "b" which is connected to Vref, or to throw "c" which is connected to ground, depending on the state of the DOUT signal on line 24 while switch 30 is coupled to ground. After the capacitor C.sub.FB has been charged, switches 28 and 30 are switched in order to provide the appropriate charge onto the summing node 12 as determined by the DOUT signal on line 24.
In FIG. 1B the timing signals for switch 28 and the voltage signal node 32 show a solid line when switch 28 is switching from the a-b to the a-c position and a dotted line when switch 28 is switching from the a-c position to the a-b position. The shaded area in the timing diagram for switch 28 indicates that the switches may be either closed or open depending on the output of the comparator 22 on line 24.
In delta-sigma modulators, it is desirable to minimize thermal noise induced on the feedback capacitor C.sub.FB by the sampling process occurring when a connection within switch 34 opens. (Switch 34, formed generally by two MOS transistors, operates in a "break-before-make" sequence.) This thermal noise voltage creates a thermal noise charge on C.sub.FB defined by ##EQU1## where k is Boltzmann's constant and T is temperature in degrees Kelvin. It is desirable to minimize this thermal noise charge Qnoise. Since Qnoise is independent of Vref, Qnoise can be reduced by simultaneously reducing C.sub.FB by the same amount that vref is increased. The result keeps the feedback charge constant while simultaneously reducing Qnoise. This implies that Qnoise is at a practical minimum when C.sub.FB is made as small as possible, usually limited to the maximum practical value of Vref for a given circuit technology.
An important limitation is the limit on Vref imposed, by MOS transistor hot electron effects. See, for example, Sakurai et al., "Hot-Carrier Generation in Submicrometer VLSI Environment," IEEE Journal of Solid-State Circuits, Vol. SC-21, No. 1, February 1986, pp. 187-192; Saletti et al., "Correlated Fluctuations and Noise Spectra of Tunneling and Substrate Currents Before Breakdown in Thin-Oxide MOS Devices." IEEE Transactions on Electron Devices, Vol. 37, No. 11, November 1990, pp. 2411-2413; Tzou et al., "Hot-Electron-Induced MOSFET Degradation at Low Temperatures," IEEE Electron Device Letters, Vol EDL 6, No. 9, September 1985, pp. 450-452; and Lo et al., "Hot-Carrier-Stress Effects on Gate-Induced Drain Leakage current in n-channel MOSFET's," IEEE Electron Device Letters, Vol. 12, No. 1, January 1991, pp. 5-7.
Therefore, there is an upper limit on the applied voltage to the MOS transistor switch, switch 34, before the hot electron effects become undesirably large. The substrate current in switch 34 can be responsible for charge transfer errors as well as a potential second source of noise. It is therefore unproductive to increase Vref and decrease C.sub.FB to minimize Qnoise while at the same time inducing degradation due to hot electron effects. As shown in FIG. 1B, with the prior art circuit of FIG. 1A the magnitude of the voltage swing at node 32 is approximately Vref.
Various methods have been used in the past to minimize these effects including the use of fully differential input signals in which the hot electron effects become common mode noise and are therefore attenuated to some degree in the fully differential circuit. Also, in p-channel devices, where "hot holes" are generated rather than hot electrons, the amount of "hot holes" generated is approximately an order of a magnitude less than the corresponding number of hot electrons generated in an n-channel device. Therefore, using p-channel transistors inside switch 34 ameliorates hot carrier effects somewhat. However, a further problem can occur when using p-channel devices in a p well technology. When n-channel devices are fabricated in a p well technology, the p wells can be connected to a reference voltage to thereby desensitize the circuit to power supply noise. However, p-channel transistors in a p well technology share a common substrate, and it is not possible to drive an n substrate with a reference voltage. Therefore, the p-channel devices in these circumstances are more susceptible to power supply noise.
Therefore, it can be appreciated that a circuit which allows the use of a large reference voltage without the hot carrier induced problem is highly desirable.